MPŠ MP&Scaron MP&Scaron MP&Scaron Avtorji

Jožef Stefan
Postgraduate School

Jamova 39
SI-1000 Ljubljana

Phone: +386 1 477 31 00
Fax: +386 1 477 31 10


Course Description

Computer Systems Design


Information and Communication Technologies, second-level study programme


doc. dr. Anton Biasizzo


The goal of the course is to familiarize the student with the digital system design methods and computer system design, including system-on-chip, networks-on-chip, and reconfigurable systems.
The competencies of the students completing this course successfully would include the basic knowledge of computer system design methods, familiarity with state-of-the art computer structures (system-on-chip, networks-on-chip, reconfigurable systems), and knowledge of their design principles.


Digital system design: introduction, history of development of the area, computer aided design, system abstraction, e.g., transistor level, gate level, register-transfer level, algorithmic model

Hardware description languages: introduction to VHDL, hierarchical design in VHDL, VHDL simulation, VHDL design cycle

Programmable logic devices: Programmable Logic Device types, PLD programming, Complex Programmable Logic Devices CPLD, Field Programmable Gate Array FPGA

Hardware design: hardware core design, hardware core reuse, multiprocessor system design, hardware accelerator design, system-on-chip, network-on-chip

Testing of digital systems: the role of testing, fault modelling, fault simulation, design for test, build in self-test, fault tolerant systems

Reconfigurable systems: dynamic partial reconfiguration of FPGA devices, on-line error recovery system, dependable system design

Course literature:

Selected chapters from the following books:

• D. Jansen, et al., The Electronic Design Automation Handbook. Kluwer Academic Publishers, 2003. ISBN 1-4020-7502-2
• V.A. Pedroni, Circuit design with VHDL. MIT Press, 2004. ISBN 0-262-16224-5
• R. Reis, M. Lubaszewski, and J.A.G. Jess, Design of Systems on a Chip: Design and Test. Springer, 2007. ISBN 978-0-387-32499-9
• S. Hauck, and A. DeHon, Reconfigurable Computing: The Theory and Practice of FPGA-Based Computing. Morgan Kaufmann, 2008. ISBN 978-0-123-70522-8
• G. De Micheli, and L. Benini, Networks on chips. Morgan Kaufmann, 2006. ISBN 978-0-123-70521-1

Significant publications and references:

• A. Biasizzo and F. Novak, “Hardware accelerated compression of LIDAR data using FPGA devices”, Sensors, vol. 13, no. 5, pp. 6405-6422, 2013.
• U. Legat, A. Biasizzo, and F. Novak, “SEU recovery mechanism for SRAM-based FPGAs”, IEEE trans. on nuclear science, vol. 59, no 5, pp. 2562-2571, 2012.
• U. Legat, A. Biasizzo, and F. Novak, “A compact AES core with on-line error-detection for FPGA applications with modest hardware resources”, Microprocessors and microsystems, vol. 34, no. 4, pp. 405-416, 2011.
• F. Novak and A. Biasizzo, “Academic network for microelectronic test education”, International Journal of Engineering Education, vol. 23, no. 6, pp. 1245-1253, 2007.
• F. Novak and A. Biasizzo, “Security extension for IEEE Std 1149.1”, Journal of electronic testing, vol. 22, no. 3, pp. 301-303, 2006.


Seminar work (50%)
Oral defense of seminar work (50%)

Students obligations:

Seminar work and oral defense of seminar work.