MPŠ MP&Scaron MP&Scaron MP&Scaron Avtorji

Jožef Stefan
Postgraduate School

Jamova 39
SI-1000 Ljubljana

Phone: +386 1 477 31 00
Fax: +386 1 477 31 10


Course Description

Advanced Computer Structures and Systems


Information and Communication Technologies, third-level study programme


doc. dr. Gregor Papa
prof. dr. Peter Korošec


The goal of the course is to improve the knowledge on reconfigurable and multiprocessor computing systems. Students get acquainted with reconfigurable and multiprocessor system synthesis and associated optimization problems.


Reconfigurable computing: devices, architectures, reconfiguration management, reconfigurable system synthesis.

Reliability of reconfigurable computing systems: on-line built-in self-test implementation, self-repairable systems

Parallel computer architectures: Topologies, shared and distributed processing, multi-core processors, clusters, grids.

Graphics Processor Units: usage, implementation variations, software specifics

Multiprocessor systems-on-chips: architectures, energy aware design techniques, high-level system synthesis, performance analysis, design environments

Course literature:

Izbrana poglavja iz naslednjih knjig: / Selected chapters from the following books:

• P.R. Schaumont, A Practical Introduction to Hardware/Software Codesign. Springer, 2013, ISBN: 978-1-4614-3736-9
• W. Stallings, Computer Organization and Architecture: Designing for Performance, 9 edition. Prentice Hall, 2012. ISBN: 978-0132936330
• M. Wolf, Computers as Components. Academic Press, 2012. ISBN 978-0123884367
• P. Marwedel, Embedded System Design. Springer, 2011. ISBN: 978-94-007-0257-8
• L. Null, and J. Lobur, The Essentials of Computer Organization and Architecture. Jones & Bartlett Learning. 2010. ISBN: 978-1449600068

Significant publications and references:

• G. Papa, “Parameter-less algorithm for evolutionary-based optimization: for continuous and combinatorial problems,” Computational Optimization and Applications, vol. 56, no. 1, pp. 209-229, 2013.
• A. Biasizzo, F. Novak, and P. Korošec, “A multi-alphabet arithmetic coding hardware implementation for small FPGA devices,” Journal of Electrical Engineering, vol. 64, no. 1, pp. 44-49, 2013.
• P. Korošec, M. Vajteršic, J. Šilc, and R. Kutil, “Multi-core implementation of the differential ant-stigmergy algorithm for numerical optimization,” Journal of Supercomputing, vol. 63, no. 3, pp. 757–772, 2013.
• K. Tashkova, P. Korošec, and J. Šilc, “A Distributed Multilevel Ant-Colony Algorithm for the Multi-Way Graph Partitioning,” International Journal of Bio-Inspired Computation, vol. 3, no. 5, pp. 286-296, 2011.
• T. Garbolino, and G. Papa, “Genetic algorithm for test pattern generator design, Automatic evolution of circuits,” Applied Intelligence, vol. 32, no. 2, pp. 193-204, 2010.


Seminar work (50%)
Oral defense of seminar work (50%)

Students obligations:

Seminar work and oral defense of seminar work.